• M0+ Stack Pointer (PSP/MSP) Clarification
    Background I'm working part-time on a Cortex M0+ based SoC converting a very processor-intensive section of C++ code (inner-loop executed 10s of 1000s of times a second & compiles to over 400 instructions...
  • Use case of MSP and PSP in Cortex M
    Hi Experts, What is the key difference between Master Stack pointer and the Process stack pointer and how an OS can take advantage of it ?
  • The reason why the exception frame forms on PSP?
    Hello experts, I would like to ask the reason why the exception frame forms on PSP in the Cortex-M architecture. My understanding is that MSP (Main Stack Pointer) is the interrupt stack pointer and PSP...
  • Modify SP register and PC register in Cortex-M1 using Keil
    Hi, I'm planning to do a bootloader for a Cortex-M1 processor but i'm having serious problems. First of all, the Keil says it expect a ")" when writing this type of inline assembly: __asm__ __volatile__...
  • Recently i bought a new kit supporting cortex m0+ processor ! I read the complete datasheet but could not find the instruction for using GPIO !!
    I searched about programming the processor using assembly language only in KEIL 4.0 ! All i found is codes written in c !! can anyone please suggest me the direction to program the board in ASSEMBLY LANGUAGE...