How to pass arguments to a bare-metal app using u-boot

I'd like to pass arguments to a bare-metal application using u-boot. Ideally, I would like to do this using CPU registers, in the same way u-boot passes the device tree address to Linux. But solutions...
Cortex A53 Bare metal booting have FIQ exception. How to debug?

Hi I study coresight test with cortex A53 CPU. I get FIQ interrupt when I running helloworld test in ini_libc function. But I don't known why. I use gcc-linaro 4.9 toolchain : aarch64-none-elf-gcc...
Enable MMU and d-cache on ARMv8 for u-boot

Hi, This question is for MMU and d-cache. When I tried to enable MMU and d-cache for u-boot I ran into Synchronous Abort handler while writing to PCIe device registers which I mapped as uncached memory...
Running two bare-metal programs on two separate cores in Cortex-A9

Hello, I have run two different bare-metal programs on two corresponding ARM cores in Cyclone V (Cortex-A9) in DS5 using JTAG line. The SDRAM is shared between the two cores as is evident from the cache...
Motherboard provider with Cortex-A53 or ARM Cortex-A57

Hello, I want to experiment with a storage solution ARM based. Is there any provider actually selling dev kits or consumer boards based on ARM Cortex-A53 or ARM Cortex-A57? Obviously the main requirement...