Processor Modes in cortex-A57

Hi, I have done some basic assembly in Armv7-A processors (cortex A9). The version of ARM supports modes like User, sys, SVC etc. Does the ARMv8 also has the similar modes? Where can i find the details...
Motherboard provider with Cortex-A53 or ARM Cortex-A57

Hello, I want to experiment with a storage solution ARM based. Is there any provider actually selling dev kits or consumer boards based on ARM Cortex-A53 or ARM Cortex-A57? Obviously the main requirement...
SIGILL in 32bit chroot on Cortex-A57

I'm getting a SIGILL when running a ARMv6 program in a chroot environment. The instruction that triggers it is Program received signal SIGILL, Illegal instruction. 0x000104f0 in f () (gdb) disassemble...
CPUACTLR_EL1 and S3_1_C15_C2_0 in Cortex-A57 TRM

hi, experts: In Cortex-A57 TRM chapter 4.3.66 : It defines CPUACTLR_EL1 register, but this register name is not CPUACTLR_EL1. Its name is S3_1_C15_C2_0. Why? best wishes, hi
How to configure Cortex-A57 PMU

I asked this question in a different community space but it seemed like this is a more appropriate home. I'm trying to configure the performance counters for the Cortex-A57 and I'm very confused. The...