Intercore interrupts on a53 between EL1 and EL3

We are working on Xilinx MPSOC which has 4 A53 cores, We are trying to run Linux(EL1) on 3 cores and Freertos(EL3) on 4th core. When software generated interrupts are raised from Linux , Freertos is not...
ARMv8 EL1 MMU

Hi, I am working on bootloader porting to ARM v8 platform. I am facing a problem in enabling MMU in execution level-1 EL1. I am not able to set sctlr_el1.M bit when ever i try to set this bit the...
Transition from EL3 to EL1 on A53

I have a standalone app running at EL3 in OCM on an A53 processor. The code boots from flash. I load an elf image into RAM and need to transition to its entry point running at EL1. I try and make the...
ARMv8 Secure EL1 problem

Hi, arm experts, We want to use ARCH32 mode in secure EL1, I see some descriptions in ARMv8 Arch Reference Manual about Secure EL1 ARCH32 mode as follows: One is the VBAR(secure), it is mapped to VBAR_EL3...
Interrupts from the secure world to the non-secure world.

Hello experts, I am using SAM L11 (Core is Cortex-M23). I did a simple test of the interrupt. In the case of the handler was the secure world, it worked as I expected. The instruction sequences are...