• ARM MUL instruction
    Still more instruction things giving me head ache. This time it's the MUL-instruction. What the heck means: Multiply multiplies two register values. The least significant 32 bits of the result are written...
  • Register 'names' in instruction descriptions
    The registers in the instructions are usually 'named' Rn, Rm, Rd, ... Is there some deeper meaning in the names? Usually Rd seems to mean 'destination register' Sometimes Rn is the only operand, sometimes...
  • Coprocessor instruction differencies?
    Are there differences between coprocessor instructions and instruction2:s? I mean: MCRR vs. MCRR2 MRRC vs. MRRC2 MCR vs. MCR2 MRC vs. MRC2 LDC vs. LDC2 STC vs STC2 I didn't find any differences in the...
  • Does Cortex-A7 have the ability to send a 128-bits exclusive transaction?
    According to related manuals, I see that Cortex-A7 is able to send 8-bits, 16-bits, 32-bits, and 64-bits exclusive access. I'm wondering that if it's able to send a 128-bits exclusive access or not.
  • UNPREDICTABLE in instruction description (Lord! yet another question)
    In quite many instruction descriptions it says: if d == 15 then UNPREDICTABLE; What does this mean? Can the instruction really work in some unexpected way in each such case or what? I guess if I use...