• range of BL instruction in arm state
    range of BL instruction in arm state is + or - 32MB as per instruction set.how...........?
  • What does this instruction do?
    In the ARMv7-A/R ARM Issue C I found two instructions with odd encoding: PUSH and POP, encoding A2. What's the Rt's role? I guess Rt and 'registers'-bitlist needs to match? Encoding A2 ARMv4*, ARMv5T...
  • What are hints?
    What does it mean that an instruction is a hint instruction, like NOP, YIELD and WFE? I haven't found any explanations in ARM Architecture Reference Manual, ARMv7-A and ARMv7-R edition, Issue C. ...
  • From the CPU's point of view, how does it distinguish an assembly code is an ARM code or a Thumb code?
    From the CPU's point of view, how does it distinguish an assembly code is an ARM code or a Thumb code? Is there some signal bit represent the code is ARM or Thumb code, this is just my guess.
  • Return address from FIQ_Handler. Do we come back to the next instruction?
    Is it MOVS pc, r14 or SUBS pc, r14, #4 This is written in the ARMDEN0013D. but in the table it says next instruction whereas the SUBS pc, r14, #4 means the instruction which was interrupted.