Data Abort Exception in A53

Hello, I am working on Cortex-A53 and using Cortex-A53 DSM Model in my design. We are getting Data Abort exception on a read to ROM address and ESR_EL3 register showing its a DECERR External error. MMU...
ARM Cortex-A53 System Register

Hello, I wanted to check the value of following interrupt related registers i.e. ICC_IAR1_EL1 ICC_EOIR1_EL1 I'm able to find the ICC_IAR1_EL1 inside the CORTEXA53 hierarchy. But NOT able to...
Cortex A53 Bare metal booting have FIQ exception. How to debug?

Hi I study coresight test with cortex A53 CPU. I get FIQ interrupt when I running helloworld test in ini_libc function. But I don't known why. I use gcc-linaro 4.9 toolchain : aarch64-none-elf-gcc...
Exception / Interrupt for Cortex-A15

Hi, I would like to know whether my understanding is right or not regarding to the interrupt (exception). When an interrupt is issued, the interrupt is executed at once without the completeion of the...
Of exceptions and aborts..

Note: This was originally posted on 21st January 2009 at http://forums.arm.com The ARM reference manual specifies sometimes MOV PC,R14 and sometimes SUBS PC,R14, #4 for returning from exceptions. But...