• Significance of the WVALID signal in AXI
    In AXI, does the rising and falling edge of the WVALID signal signify the start and end of a write burst? Can the WVALID signal go low before the write request for all the transfers in that burst are...
  • Use of WVALID signal in AXI
    In AXI, does the rising and falling edge of the WVALID signal signify the start and end of a write burst? Can the WVALID signal go low before the write request for all the transfers in that burst are...
  • AXI Write Access: WLAST/WVALID handling
    Can I set WLAST high while WVALID is low? The AXI specification is not clear at this point.
  • Question for AXI responce when access error
    HI, Does anyone know the minimum number of error responce (wready & rvalid) when AxLEN = 15? Does it need to respond 16th? or we can respond 1 only? Regards, -GARO
  • axi ordering
    Hi the master is connected to axi-interconnect and two slaves(A and B) are connected to axi-interconnect. The master send a write transcation(AA) to slave A and then send a write transcation(BB) to slave...