What's the difference between LDAXR and LDREX

Hi experts: In armv8 specification, I have found two types of exclusive access instructions: LDAXR/STLXR and LDREX/STREX. I have some questions about these instructions: (1) What's the difference...
How to flush write buffer when memory attribute is normal_nc

Hi, I am working on access pcie bar in armv8-a cpu(cortex-A5x) powered soc. Right now, I encounter an issue about (maybe) coherent issue. When I write data(4 bytes aligned) to pcie bar with ioremap_wc...
Cache Coherence

Hi , I am working on ARM Multiprocessor. The Following is scenario for Cache coherency . Please let me know if it is valid. 1. Bring Core 1 out of reset. 2. Bring Core 2 out of reset. 3. Invalidate...
What is the difference between ARM cortex-A and cores in snapdragon from Qualcomm?

Hi All, What is the difference between ARM cortex-A and cores in snapdragon from Qualcomm? I know that they say it is compatible with ARMv7/8 ISA. Regards Nitin
What's the difference between ETM and Debug?

In the ARM core such as cortex-R4, it has ETM and Debug so I want ask What's the difference between ETM and Debug?