• Instruction Modification: DCCMVAU and write buffer
    Hello, The ARMv8-A-TRM provides the code snipped shown below, under section K9.5.2 within subsection "Ensuring the visibility of updates to instructions for a uniprocessor": Assume that the memory...
  • Is there any tool to profile power of a C code on Linux running on Cortex A53?
    We want to profile the power consumed by an application running over Linux kernel 4.2.x on Cortex A53. Is there any tool which can help here? regards, Ravi
  • Arm a53: Populate TLB without table walk?
    Hi, From a previous question I got that setting the EPDx bits from the TCR_ELx register to 1 will disable table walk. Good starting point. But, should I access the same memory location again, it won...
  • Data Abort on read, although write can be executed without any abort.
    I am a begginer to arm and I have a problem with understanding Data Abort that I get when reading from memory (ATCM) when I read from atcm. next pc jumps to 0x10, so Its Data Abort. However, If I...
  • Can we run the Cortex-A53 cores at different clock speeds ?
    Dear ARM Group, Can we run the A53 cores at different clock speeds? if YES,  How does it effect the complete A53 (L2 cache etc) and system? if NO,  What are the constraints ? could you please give a detailed...