MMU and Cache configuration

Hello there, I want to enable MMU and Cache to improve the performance of my arm cortex-A5 core. I have gone through the Reference manual of arm cortex a5 and found the below step to enable mmu and...
Why Cortex-R series is real time oriented ?

Hi Forum, Why Cortex-R series is real time oriented than other ISA(ARM/others) ? Is there a list of all the points and comparison with ARM Cortex-A ? Why we can not make Cortex-A to suite for real time...
Trouble configuring MMU for 2MB block mapping

So I'm working with QEMU and AArch64 mode and using the MMU. I've succesfully mapped 4K blocks, but I'm having trouble mapping 2M blocks. My configuration is such that the L1 entries are 1GB blocks, L2...
10 Useful Facts about Cortex-M System Design Kit (CMSDK)

The Cortex-M System Design Kit (CMSDK) is an extremely useful product for chip designers and FPGA designers working with the ARM Cortex-M processors. It contains a wide range of AMBA bus infrastructure...
Cortex-A5 Evaluation boards

Note: This was originally posted on 26th July 2011 at http://forums.arm.com Hi All, Is there any evaluation boards available in the market for cortex A-5 ?. I would like to evaluate A-5 performance...