Correct usage of the NSTable bit in aarch64/armv7a LPAE

I'm porting our armv7a-short descriptor OS to LPAE and aarch64. In the short descriptor MMU, the "NS" bit can only be found in the first level of the MMU (I'll call it the SECTION level), meaning that...
New developer guides for AArch64

We (Arm's Support and Content Services teams) have been working on creating a Developer Guide for AArch64. They're aimed at anyone wanting a bare-metal focused introduction to the Armv8-A architecture...
luajit compilation on aarch64

Hi, I am trying to build luajit on aarch64 platform. I have downloaded source from https://github.com/cbaylis/luajit-aarch64 . I am getting the below error when I compilled the source. root@node...
AARCH64 banked registers

I am failing at searches can someone point me to a reference for the banked registers for an FIQ in AARCH64 on a cortexA53 I can find hundreds of references for AARCH32 banked registers but none for...
AARCH64 assembly syntax for ARMCLANG

Hello, where can I get documentation for the AARCH64 and NEON64 assembly syntax for armclang (internal assembler) I have some issues when compiling my GNU assembly code with armclang. For example, the...