Cache maintenance and DMA

Greetings ARM community, I have been tasked with cache maintenance. The necessity popped up because of DMA issues on USB. As a quick (not perm solution) I used the invalidate all routine. While obviously...
Cache and store buffer maintenance in cortex-a8!

Dear All, Technical data sheets for the ARM7500FE and ARM7100 say that: "In the ARM Processor the cache will be searched regardless of the state of the C bit, only reads that miss the cache will be affected...
Cortex-A8 Pipelined cache maintenance

Hi, I am new to the Cortex-A8, I would like to know what is the advantages of using "pipelined cache maintenance operations". "Auxiliary Control Register " has the "Cache maintenance pipeline" bit enabled...
Cache maintanance operation to PoC

Hi experts, I'm quite confused about cache maintanance operation to PoC on Cortex-A9 (with PL310 L2 cache controller). I'm refererring to the following operations: - DCIMVAC, invalidate data cache by...
ARMv7 performance monitor:how to get L2 cache refill?

The processor is Samsung's Exynos 4210, ARM Cortex-A9, I want to know whether it supports the L2 cache refill or memory access event?