Cortex-A35 performance for DDR3 read accesses

Hi, I am using iMX 8X which has 1 cluster of 4 Cortex-A35 cores, with DDR3L (DDR3-1866) with ECC enabled. I performed some measurement for MEMCPY and MEMSET functions to have an estimate of the...
Performance ratio between A35 and M4

I am working on project and i used A35 to measure the performance of Application and this application will be ported on M4 , is there a fixed ratio or an equation so i can estimate the execution time...
Difference between revisions

Hello, I'm very new at the community, I want to start working with the ARM cortex A15, while looking for the datasheet, I got the page ARM Information Center , where I found a LOT of information about...
Cortex-A35 CoreMark results

Hi, I can't find CoreMark/MHz performance results for the Cortex-A35. Only DMIPS is available, but it is not always as reliable... Can you provide CoreMark results for A35? Thanks. Étienne
Cortex-A35 cache partitioning

Hi, I am using a Cortex-A35 (Armv8-A) in a processor and I am looking for any technique that could allow the L2 unified cache to support partitioning between running processes (for non interference...