• LPC17xx imprecise error
    I'm using array of buffer structure to store the data sent by external chip interfaced by SPI. it contains the data pointer and next pointer. The storage of data sent is triggered by the external GPIO...
  • Imprecise MAM simulation on LPC21xx?
    I have noticed that timing of Memory Acceleration Module (MAM) is not simulated correctly (at least not for setting typicaly used in Keil demos) for LPC2138. Does anybody have the same experiences...
  • Cortex M0+ access fault
    I am working on a bootloader for a Freescale MKE06Z processor. My test code erased the interrupt vector table and other program data in the first 5 sectors to be replaced with new code, and then loaded...
  • Failed to solve a imprecise hardfault error
    i m working on lpc1788. I use Keil rtos and mailbox to pass the data from the uart handler (as read from a thread on this forum). All was working well till date, untill i added a few bytes of code...
  • Logging a fault on a Cortex machine
    In the generic user guide of the Cotex M4 architecture (4.3.10 Configurable Fault Status Register) , I found this statement: "This is an asynchronous fault. Therefore, if it is detected when the priority...