• atomic - LPC313x
    Hello to everyone, can anyone please advise me whether it exists a way to execute on an LPC313x more than one instruction atomically (like for instance _atomic_ for C16x)? Thanks and best regards...
  • Can RTX Kernel work on LPC313x?
    Has anyone been able to make RTX Kernel run on the LPC3130 or LPC3131 CPU? (ARM9 @ 180MHz with 128Kb/256Kb SRAM) I use Embedded Artists LPC3131 board. Any help on getting it working on this platform...
  • Enabling I-cache resulting into an abort
    Note: This was originally posted on 17th November 2010 at http://forums.arm.com Hi, I am working on a bootloader for Cortex-A8 based on the open source bootloader U-Boot v2010.06. I have a 2 stage approach...
  • load image into cache and execute it in cache
    Note: This was originally posted on 31st January 2013 at http://forums.arm.com Hi Experts:     i have heard that some ARM platform providers load their bootloader into L2 cache, and execute the bootloader...
  • ARM Bootloader: flush D/I-cache, disable D-cache and enable I-cache
    Hello everyone, I'm analysing u-boot for s3c2440(arm920t), and at the first stage u-boot does something like this: mov R0, #0 mcr P15, 0, R0, C7, C7, 0   ; flush v3/v4 caches mcr P15, 0, R0, C8...