• CA9MP - Join and Leave coherency
    Note: This was originally posted on 23rd July 2012 at http://forums.arm.com Hi, I have some thoughts regarding joining and disengaging cores to the coherency: In the bootstrap, the case is very easy,...
  • Accelerator Coherency Port
    Note: This was originally posted on 25th January 2013 at http://forums.arm.com Hi all, I'm trying to use the AcceleratorCoherency Port of the ARM A9MPCORE in the Xilinx Zynq platform ( http://www.xilinx...
  • What are coherent observers?
    ARMv8 reference manual refers to "coherent observers" to define coherence-order (pg B2-117). Which observers are coherent?
  • load image into cache and execute it in cache
    Note: This was originally posted on 31st January 2013 at http://forums.arm.com Hi Experts:     i have heard that some ARM platform providers load their bootloader into L2 cache, and execute the bootloader...
  • Cache disabling
    Note: This was originally posted on 1st September 2010 at http://forums.arm.com As I walked through the code of different boot loaders (say uboot) , I found that they flush and disable cache in startup...