• cache maintenance on cortex-a8
    Note: This was originally posted on 17th November 2011 at http://forums.arm.com [size=2]Hi ARM experts, I am a little confused about the cache maintenance on cortex-a8. Some understanding were listed...
  • Forum Maintenance
    All, You may have noticed that the forum has been down for the past 24 hours or so. We are experienced some growing pains as we adopt this new web framework, but the Keil web team has been working...
  • caches initialising in Cortex-R4
    Note: This was originally posted on 18th November 2009 at http://forums.arm.com Hi, Do we need to initialise tag ram of cache in Cortex-R4 after reset. In my simulation I see that if I don't, signals...
  • Cortex M3 Cache disable
    Note: This was originally posted on 23rd August 2010 at http://forums.arm.com Hi everybody, I have here an STM32F103ZE with an Cortex M3 core and I need to disable the cache. But unfortunatly I dont find...
  • Operator ":"
    Hi, I saw this expression in a header file, and I don't know what ":" means, will you please tell me. unsigned char variable : 2; thanx