• Cascade interrupts
    Hi, First I tell my 'funny' situatuion short: up Inf C167, RTX-166 - 'Main' Timer1 execute an interrupt func.(8ms tact) - In this func. the PEC register PECC1 will be initialiazed and the AD converter...
  • Using NEON instructions to speed up cascaded biquads - how it works?
    I am trying to understand how the cascaded biquad filtering is optimized for Arm processors in CMSIS using Neon extensions. The code is ifdefed under `#if defined(ARM_MATH_NEON)` here: https://github...
  • AXI ID problem for cascaded interconnect design
    Note: This was originally posted on 18th December 2010 at http://forums.arm.com As we know, the interconnect can add bits  to ID fields to indentify the master issuing the transaction.  In the SoC design...
  • Division with NEON
    Note: This was originally posted on 30th September 2011 at http://forums.arm.com Hi. I have 4 unsigned 16bit values into a Dn register (or 8 into a Qn register) [v1] [v2] [v3] [v4] I'm looking for the...
  • NEON Error