• TCM alternative in A15
    Note: This was originally posted on 19th October 2012 at http://forums.arm.com Hi We want to use an A15 core for some packet processing function with a really high throughput. This means that  every packet...
  • Bank selection using A15
    I interfaced 64Kb of external memory to my C167CR at base address 0x80000. That memory consists of two 32Kb chips. The memory is \CS2 selectable and I want to use the A15 pin of the address bus for...
  • Unable to trigger SWI via GIC on Cortex A15
  • Cortex-A9/A15 L1 d-cache architecture
    Note: This was originally posted on 21st March 2012 at http://forums.arm.com Dear friends, I'm a PhD candidate at the Complutense University of Madrid. I'm doing reasearch on memory allocation over the...
  • Accurate cycles count for FVP_VE-Cortex-A15?
    Hello everyone, I developed a bare metal system for Cortex-A15 Versatile Express board. I used Fast Models to run/debug the system and now I want to perform some performance test to measure latencies...