• SMMUv2 - Arm Corelink-MMU500 on Xilinx Zynq Ultrascale+
    Hi to all, I am developing an Operating System for ArmV8-A that ensures spatial isolation among the tasks using memory virtualization. I already wrote the MMU driver successfully and now I am trying...
  • Standalone gdb server?
    Has anyone encountered a standalone gdb server? That is gdb server that runs on a bare metal. I've been looking for sources to build one. Doesn't need to be ARM, but that might help. Maybe someone has...
  • How did you measure the Instruction cache efficiency? Just code execution from Flash? Reading data from Flash? Programming data to Flash?
    This question was raised in the ' How to implement a secure IoT system on ARMv8-M ' webinar, view all the questions in the round up blog post .
  • Three question on AXI transfers, related to disjoint byte access in a single 4 byte word, single transfer.
    I have three question on AXI transfers, and these all relate to a) my understanding of the spec, as all question do, and b) a single write transfer to a single 32-bit aligned address. I would like to...
  • GIC500 :: Not able to disable Affinity Routing
    I'm not able to disable the affinity routing (i.e. ARE_S and ARE_NS bits being set always). Reset value of GICD_CTLR register is 0x30. Actually I want to forward the interrupt from Distributor to multiple...