• Arm Coresight : Post process for trace
    How does post process work for trace verification ?
  • Embedded Trace Fifo(ETF) in Hardware FIFO mode flushing trace data
    Hi there, good morning. I am using TMC as Embedded Trace Fifo and testing it for FULL condition. Is there any way, I can stop TMC from not reading the trace data that is written in the SRAM of ETF? So...
  • Coresight 400 tool installation and IP generation
    HI all, I am new to this tool. I have following queries 1. To install this, do we requires all the tools the verified in 'verify_install_cssoc.sh' 2. Becuase i dont have all the tools, i just...
  • Arm Coresight:ETB
    The ETB/ETF sitting in the trace path may be used as a circular buffer (capture) trace sink or configured into hardware FIFO mode or software FIFo mode. So how to choose which mode need to br programme...
  • TRace
    What is the diffrence between STM trace and ETM trace? please tell me some usecase ?