Cortex-A7 instruction lists

Just in case someone needs them, I made ARM and Thumb mode lists of Cortex-A7 instructions (because I didn't find them in the net). They are generated from ARMv7-A/R ARM with a simple AWK-script and then...
TCP/IP stack for Cortex-A9 MPCore

Hi, I'm currently working on a project based on the Arria V SoC FPGA (ARM Cortex-A9 MPCore). The goal of this project is to run a high speed ethernet link. For some reasons the customer don't want to...
Anyone knows of any Cortex-A9 development boards?

We've been using TI's Panda board but it seems to give us quite a bit of trouble. As a result we can't profile the information that we would like. Does anyone know of any other development boards out...
Turning on MMU and caches on Cortex-A7?

In my little program (rpi_stub) it's time to turn on MMU and caches. Most of it I seem to have hold of, except cache invalidations. In multicore situation (rpi_doesn't support yet, but maybe later...
Cortex A9 dual core - How to achieve an AMP system without an RTOS?

One of my customer is considering to use Cortex A9 dual core device for a computational intensive task (For the sake of discussion, lets assume an high end image analysis task). Due to cost or other over...