• Simulating the Arm Scalable Vector Extension with gem5
    Co-authored with Giacomo Gabrielli and Jose Joao The Arm Scalable Vector Extension (SVE) is a key technology for Arm processors to efficiently address the increasing computation requirements of future...
  • Making Temporal Prefetchers Practical: The MISB Prefetcher
    This blog post was co-authored with Dam Sunwoo. Temporal data prefetching usually introduces huge on- and off-chip storage and traffic overheads, making them impractical. However, a novel solution proposed...
  • SCALE-Sim: A cycle-accurate NPU simulator for your research experiments
    Architectural Simulators Architecture simulators of various kinds are a key tool in the computer architecture toolbox. They provide a convenient model of real hardware, such as a CPU or even a whole...
  • Integrated reciprocal conversion with selective direct operation for energy harvesting systems
    Journal Title - IEEE Transactions on Circuits and Systems Authors - Arm: Anand Savanth, James Myers, David Flynn. University of Southampton: Alex Weddell, Bashir Al-Hashimi Wireless sensor systems are...
  • Power Delivery for High-Performance Mobile Systems (1/3)
    In the first post in a three-part blog series, Shidhartha Das explores the challenges of power delivery in designing mobile systems. High-Performance Mobile Systems Power delivery is a well-known...