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we use Keil RTX on a M4 core (XMC 4500) which contains a memory protection unit. We want to run some parts of the software in its own memory space. I have found the description about CMSIS-Zone (CMSIS-Zone) which should provide MPU support. In the thread mode multiple processes should be possible.
- Does anybody know if this feature is planned for Keil RTX.
- Are there other RTOSs which support this kind of features already?
Thanks a lot for any hint
Thanks for getting in touch with us.
We have just started to discuss MPU extension for CMSIS/RTX5. Some low level MPU APIs are already in place as part of CMSIS-Core(M) for a while. On the development branch we added a first draft implementation for an MPU callback to RTX5, see commit 0e45768. Please be aware that at the current stage its only an experimental API and it will change as we move on.
Our current idea is to let the user provide the MPU regions used per thread. The current stage needs you to place the thread stack manually to a region accessible by the thread. We think about moving this responsibility to RTX5 scheduler, soon.
With CMSIS-Zone we want to create a common basis for graphical design tools for system partitioning, i.e. creating adequate MPU regions.
FreeRTOS has some kind of MPU support as well.
Please let us know about your opinion about MPU enhancement for RTX5.
How is the status of the MPU support in RTX5?
You told me that you will have a released version at the end of Q3/2018.
Can you provide any preliminary documentation to get an understanding of the usage and the features?
Best regards, Jussy
Unfortunately we have no further progress compared to the draft stated earlier. We are focused on getting the non-MPU version of RTX5 ready for functional safety, first.
The usage/features we have in mind is sketched as part of CMSIS-Zone. We intend to introduce the concept of processes for RTX5, which is an arbitrary grouping of threads with shared memory access privileges. This concept is very similar what is used on Windows/Linux when talking about processes and threads. The scheduler of RTX5 shall provide a mechanism to change the MPU configuration whenever a thread switch (from one process to another) occurs. With a proper memory layout (partitioning) a segregation between processes can be achieved.
The latest release of CMSIS already contains the basic functionality to put all this together on your own. RTX5 (compiled with the define MPU_LOAD) calls the scheduler hook osRtxMpuLoad. Core(M) contains a couple of functions to load MPU configurations from a predefined table. I expect the final solution to be basically implemented that way.
Of course there are many issues we need to solve in order to make the MPU protection applicable to a wide range of requirements. We need to further discuss how to handle privilege escalation for instance.