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Evaluation team profiles
Suriya Gunasekaran
June 6, 2023
Ish Dham
Distinguished Engineer
Architecture and Technology
Arm
Ish is a Distinguished Engineer at Arm in the Architecture and Technology group. With a background in Computer Science, Ish comes with a strong passion for Computer Architecture. He has been involved in the design and validation of high quality processors and SoCs spanning multiple domains. Currently, Ish is driving the machine readable specifications strategy for Arm architecture. As part of this strategy, Arm is endeavouring to provide as much of the specification as possible in a structured machine readable fashion besides the standard document format. Through this, we hope to enable innovation in both hardware and software design that relies on accurate interpretation of the architecture.
Amit Chhabra
Senior Principal Physical System Architect
CE - Technology
Arm
Amit Chhabra has 21+ years of experience in memory design, path-finding Design Technology Co-Optimization (DTCO) in stacked CFET technologies, radiation hardening techniques and FIT rate estimation, physical system architecture definition of CPU+GPU systems for high end mobiles, Adaptive Voltage Scaling (AVS) sub-system IPs, and silicon debug. He published 9 papers in IEEE conferences/journals including the prestigious VLSI symposium and Journal of Solid-State Circuits (JSSC), 4 papers in EDA conferences, 7 papers in global internal conferences, filed 22 US patents, and delivered an invited talk at an IEEE conference. He was honored with multiple awards, including Inventor of the Year Award at Arm Corporate Level, Gold & Silver Awards at ST Corporate Level for his projects, best leader and best performer in his groups, etc. Amit did his B. Tech. in Electrical Engineering from IIT Delhi in 2002.
Nruthya Nagesh Prabhu
Principal Layout Designer
SE - Physical IP
Arm
Nruthya Nagesh Prabhu works as Principal layout Designer at Arm, Bangalore. She is an experienced team leader, handling multiple projects from 130nm to 3nm. She has expertise in Development of Standard Cell Library includes feasibility study, define cell architecture, cell design, power grid architecture, DRC/LVS, cadence skill scripting and shell. She is also proficient in standard cell layout techniques and QC process associated with the layout. She did her Bachelor of Engineering in electronics and communication from Visvesvaraya Technological University.
Silpa Bhattaram
Principal CPU Architect
CE - Technology
Arm
Silpa is working as Principal CPU architect at Arm. She has been working on Power and Performance modeling and projections for GPUs and CPUs. Prior joining to Arm she has worked at Nvidia and Intel. She has done her masters in VLSI tools and technology from IIT Delhi. She also holds a PhD in Computer Science from IIT Delhi where she has worked on Power Efficient Graphics Processor Architecture for her thesis work.
Krishan Solanki
Staff Engineer
General purpose and Microcontroller Sub-Group
STMicroelectronics, India
Krishan Kumar Solanki, a seasoned professional with over 17 years of experience in Embedded system design and support. He has been a valuable member of the Embedded Applications support team at STMicroelectronics India for the past 12 years. Krishan's expertise spans across various Microcontroller cores, including ARM7, ARM CM0 to CM7, MSP430, 8051, PIC, AVR, and more.
Throughout his career, Krishan has contributed to a wide range of applications, demonstrating his versatility and adaptability. He has successfully worked on projects involving IoT, BLE, NFC, Automotive, Motor Control, Inverter, Metering, Industrial and Home Automation, and various other domains. Krishan's current focus lies in the realms of security and AI applications.
Subham Boharapi
Tech Leader
General purpose and Microcontroller Sub-Group
STMicroelectronics, India
Shubham is currently working as a tech leader in STMicroelectronics and has Industry experience over 13 years as a developer and project leader on electronics systems for multi-disciplinary domains (HW & SW). He has a deep understanding of MCU architectures, peripherals, and development tools, dedicated to providing exceptional technical support and guidance to customers in their MCU-based projects.He is passionate about assisting customers in achieving their MCU-based project objectives and delivering exceptional support throughout their development journey.His main areas of expertise are Microcontrollers of various core, Embedded Software, Wireless stack developer, HMI, and Graphics.
Dipan Mandal
Senior Principal Engineer
CE - Technology
Arm
Mr. Dipan Mandal is a Senior Principal Engineer at Arm. He works on next generation Arm Cortex-A profile processor and sub-system architecture exploration, definition, and benchmarking. Prior to ARM, he was a research Scientist at Intel labs and a Principal Platform Architect and Member of Technical Staff at Texas Instruments. His expertise and research interests are centered around co-design of hardware architectures and algorithms in deep learning, computer vision and multimedia. He completed his BTech from IIEST, Shibpur, West Bengal. He is a Senior Member of IEEE, has 25 published US patents and 10 publications in reputed IEEE conferences till date.
Denil Das Kolady
Principal Layout Designer
SE - Physical IP
Arm
Denil Das Kolady works as a Principal Layout Designer at Arm. As a Mask designer, his role includes deciding overall layout design strategy for each IC technology nodes and designing the most efficient mask layouts for better yield/power/performance and with least area. He guides the fellow engineers to solve the physical related problems in advanced technology nodes. Over last 17 years, he is working closely with the logic library development, witnessing the technology scaling and its challenges from 90nm to 3nm technology nodes. He has 4 US Patents (2 Filed). He has done his MS in Microelectronics from BITS.
Jose John Thottungal
Staff Engineer
Architecture and Technology
Arm
Jose John Thottungal is an accomplished Embedded Engineer with 10+ years of experience. He holds a bachelor's degree in Electronics and Communication Engineering. Jose possesses expertise in firmware development, microcontroller programming, and architecture verification. He has successfully developed test suites for verifying diverse CPU architectures, including RME. Jose's notable achievements include the development of boot code for Arm Architecture Compliance Kit (ACK), where he showcased his ability to debug complex issues and optimize performance. Furthermore, he has successfully integrated ACK with various compiler toolchains, ensuring seamless compatibility and efficient code generation.
Joyjeet Kar
Principal Engineer
Architecture and Technology
Arm
Joyjeet Kar has been working in the Semiconductor industry from past 10+ years, contributing to front-end design of Arm Processors and System-IPs. His work involves building tools and methodologies to enhance effectiveness of Memory systems architecture design and verification.
Mentoring is something that he likes to spend time on and had a good bit of experience mentoring junior engineers at work. He has also attended as a mentor in a 4-day bootcamp organized by Gates foundation in partnership with Arm and UNICEF in WFP Headquarters, Munich to solve Sustainability challenges through technology. He holds a bachelor's degree in Electronics and Instrumentation Engineering from West Bengal University of Technology.
Kapil Mittal
Principal Design Engineer
SE - Physical IP
Arm
Kapil Mittal is currently working as “Principal Design Engineer” at ARM Noida. He has over 12 years of work experience with expertise in Memory Circuit Design, Memory Characterization and using ML to optimize Memory verification. In past, he had worked at Synopsys, Cadence, and STMicroelectronics. He pursued his MBA from IIM Lucknow, B.Tech in Electronics from YMCA Faridabad, and professional courses on Memory Design from IIT Delhi.
Parivesh Chandra Gupta
Principal Engineer
SE - SoC Engineering
Arm
Parivesh Chandra is a semiconductor professional with a background in Electronics and Communication Engineering, Graduating from NIT Warangal in 2006.He has over 17 years of expertise in the design and verification of complex electronic designs. He is specialized in CPU and processor complex verification, with a track record spanning over 15 years in this field. With a deep understanding of ARMv8/ARM64 and ARMv9 architectures, he possess extensive knowledge in this domain. He has hands-on experience in verifying major coherency protocols and are well-versed in x86 core, North Bridge, and South Bridge architectures.
Having been involved in over 10 tape outs across multiple products, he has a strong background in the end-to-end design and development process. In addition to verification prowess, he has also been involved in the complete lifecycle of IP development, starting from specification, and culminating in RTL implementation.
Nithin Jindal
Principal Design Engineer
SE - Design Enablement
Arm
Nithin Jindal has total industry experience of around 13 years. In his first half of the career, he had worked on SRAM design and characterization and in the later half worked to support memory flows and methodologies. He has developed multiple tools to improve efficiency and debugging in layout and design activities of SRAM design flow. He holds bachelor's degree in Electronics and communication engineering from Thapar University.
Desikan Srinivasan
Director of Engineering
CE - CPU
Arm
Desikan Srinivasan works as Director of Engineering at Arm. He has been working on the design verification domain for more than 25 years. He is currently managing a part of CPU design verification team in Arm Bangalore and has been with Arm for more than 16+ years. He had worked for IBM and Transwitch in the past.
Mohit Chanana
Principal Design Engineer
SE - Physical IP
Arm
Mohit is a semiconductor professional working in Arm for more than 10 years. He is skilled in complex circuit design and have worked upon memory architecture on various technology nodes (including latest ~3nm). He is presently working as an IP lead responsible for complete lifecycle of product development starting from specification to final tape out. He holds expertise in building and managing teams to achieve high standards of product development along with defining product specification and roadmap with external customers. He has B.Tech (ECE) from Netaji Subhash institute of technology passed out in year 2012.
Dr. P. K. Verma
Assistant Professor
Rajkiya Engineering College, Sonbhadra UP.
Dr. Verma is working as an Assistant Professor in the Electronics Engineering Department at Rajkiya Engineering College, Sonbhadra Uttar Pradesh since 08 Dec 2017. Prior joining to REC Sonbhadra, he worked at the National Institute of Technology (NIT), Hamirpur HP as a Lecturer in the Electronics and Communication Engineering Department. He has more than 7 years of teaching and research experience. His expertise and research interests are centered around cognitive radio networks, channel modeling, and circuit design. He has published more than 25 research papers in International Journals/Conferences and book chapters of repute and delivered invited talks in FDPs/Conferences. He was honored with multiple awards, including the Commendable Research Award at DTU Delhi for his research publications, Award of Excellence, and Appreciation Awards at various levels. He has done his M.Tech in Microwave & Optical Communication from DTU Delhi. He also holds a Ph.D. in Wireless Communication from DTU Delhi.
Ramesh P
Assistant Professor
College of Engineering Munnar
Ramesh P is currently working as an Associate Professor at College of Engineering Munnar affiliated to APJ Abdul Kalam Kerala Technological university. His current areas include developing assistive technology applications , Implementation of High speed multipliers and developing packaging solutions for micro devices using LTCC. He has completed his Ph.D from the Indian Institute of Technology Bombay in the year 2012 where a micro power source using PEM fuel cell technology was fabricated and packaged using LTCC technology and used it as an alternative for battery in field deployed electronic applications. He has got about 40 research publications in reputed journals and conferences and 8 patents to his credit.
P S Mann, Ph.D.
Assistant Professor
Gujarat Technological University, Ahmedabad.
P S Mann received his Bachelor’s degree (B.Tech) with Honours (Institute Gold Medal) in Information Technology from Kurukshetra University, Haryana, India, Master’s degree (M.Tech) in Computer Science & Engineering and Ph.D. in Computer Science & Engineering from IKG Punjab Technical University, Punjab, India. He has published more than 80 research papers in various International Journals, and Conferences. He is reviewer of many distinguished journals published by IEEE, Elsevier and Springer. He has delivered experts talks at various organizations and chaired many conference as well. His research interest includes Artificial Intelligence, Soft Computing and Sensor Networks.
Dr. Abhinav Gupta
Assistant Professor
Rajkiya Engineering College Sonbhadra
Dr. Abhinav Gupta is working as Assistant Professor in Electronics Engineering Department, Rajkiya Engineering College, Sonbhadra, India.Dr. Abhinav received his B.Tech degree in Electronics and Communication Engineering from Uttar Pradesh Technical University, Lucknow, India, in the year 2008, M.Tech degree in Microelectronics and VLSI Design from Motilal Nehru National Institute of Technology Allahabad, Allahabad, India in 2011, and Ph.D. degree from Motilal Nehru National Institute of Technology, Allahabad, Prayagraj, India, in 2018. He has more than 8 years of teaching and research experience. His research interests include modeling, simulation, and characterization of advanced, scalable MOS devices and circuits for analog/RF applications.He has published more than 40 research papers in international journals and conferences of repute. He has also published two patents in the year 2022. Dr. Abhinav is a senior member of IEEE. He has guided 2 MTech students and currently 1 PhD student is enrolled under him.
Dr. Biju Paul
Professor
Rajagiri School of Engineering & Technology, Kochi
Dr. Biju Paul is a professor in Rajagiri School of Engineering & Technology.Completed B E in Computer Science from Bharathiar University. Completed Masters in Internet Computing from University of Wales NEWI, UK. Awarded with PhD for his research in Wireless Sensors Networks from VELS University. With Rajagiri School of Engineering & Technology from 2004. Interested areas Enterprise IOT, Wireless Sensor Network, Security in Computing. Published many conference papers and organized many international conferences. Visited many universities in Japan, UK, USA, Australia as a part of academic and research collaborations.
Prof. (Dr.) Devi Krishan Pal Singh
Dean,
IIMT University, Ganga Nagar, Meerut
Prof. (Dr.) Devi Krishan Pal Singh
working
as a
Dean,
IIMT University, Ganga Nagar, Meerut. Completed Ph.d (PAED) in Indian Institute of Technology, Roorkee, Uttarakhand, India.
He is having 30+ years of experience which includes Industrial Experiences and in different roles such as Professor, Dean, Director etc with various Engineering Colleges. He published many research papers in International Journals, and published research papers in National and International conferences.
Announcements
Unveiling Innovation: A Journey through the Inventors Challenge 2023
Apurva Varma
The realm of technology is ever-evolving, and at the forefront of this dynamic landscape is Arm – a powerhouse in semiconductor design. Arm has consistently pushed the boundaries of innovation, and The…
November 28, 2023
Winners: The Inventors Challenge 2023
Apurva Varma
Winners of The Inventors Challenge 2023. Eight teams emerged as the winners of the challenge and won Rs 50,000 each. Here's the list of Institutes who won the Inventors Challenge:
PES University
…
November 27, 2023
The Inventors Challenge 2023: Semifinalists Details
Kousalya Sundaresan
We are delighted to announce the semi-finalists for the Inventors Challenge-2023 competition.
September 8, 2023