Browse By Tags

英文版 English Version:Taking the fear out of silicon debug

现代 SoC 可谓工程上的伟绩，不断地从有限的功率与面积中榨取更多性能。 然而，复杂性是可靠性的死敌。

“调试一段代码要比当初写这段代码难上两倍。 所以，你把代码写得无比聪明，你也必定不会聪明到能够对其进行调试。”

— Brian W.Kernighan 和 P. J. Plauger《The Elements of Programming Style》

Chinese Version 中文版：了却芯片设计的恐慌

The modern SoC is a feat of engineering that continually squeezes greater performance from defined power and area constraints. However the arch nemesis of reliability is complexity.

“Debugging is twice as hard as writingthe…

We all know that to get anywhere in life you need to have connections. A good connection will open the right doors for you and ensure that you reach your potential with the minimum of wasted energy. The same is true in the microworld of an SoC! Massive…

It’s been a busy start to the year for ARM as the year kicked off with CES 2015 showcasing some of the amazing experiences the consumer electronics of today (and tomorrow!) can provide. We saw a lot of incredible ARM-based products on display highlighting…

原文地址：Interview: How to solve the IP integration problem

原作者：eoin_mccann

我最近很荣幸地访问了 David Murray，并讨论了 IP 集成在系统构建过程中的现状。你们有些人可能不认识 David。他是一位充满激情的技术专家，曾担任 Duolog 公司的首席技术官；目前在 ARM 担任令人印象深刻的职位 - IP 工具架构师。他非常有活力并且善于表达，能在聆听时始终保持专注，希望您能享受以下专访。您可以在下面的备注区域提出问题，

Chinese version 中文版： 人物专访：如何解决 IP 集成问题

I recently had the opportunity to sit down with David Murray and talk about the current state of affairs for IP integration in the context of building systems. For those of you who do not know David, he is an incredibly…

Last week I attended ARM TechCon in Santa Clara and one of the topics covered sparked my interest for this blog – wearables.

Did you know that Wearable Technology represents the fastest growing device segment currently expected to grow by 400+% from…

What is the connection between rugby football, interconnect and performance analysis kits?

There is a seemingly never-ending march towards smaller, cheaper and more efficiency in complex chip design, and every component of the modern SoC is being squeezed…

As the number of processors and I/O masters in an SoC continues to rise the need for an efficient and easy to design interconnect becomes critical. An interconnect must provide sufficient throughput and low enough latency for all masters in the system…

At this year's ARM® TechCon™, Carbon Design Systems did a joint presentation with ARM entitled "Getting the Most out of the ARM CoreLink™ NIC-400."  In this blog, I'll give a high level overview of what we presented and also give an opportunity to download…

I created a short introduction to the QVN protocol used with the QVN-400 plugin to NIC-400 and with the DMC-400 dynamic memory controller. This is a non-confidential introductory-level document for those seeking to understand how QVN works and what issues…