Interconnects and open standards have been a hot topic lately. A couple of weeks ago, Arm announced the CoreLink CMN-600 Coherent Mesh Network and CoreLink DMC-620 Dynamic Memory Controller IP, which support AMBA 5 CHI, the open standard for high performance…
Recently, Cadence Design Systems announced a suite of CCIX IP products which includes Controller, PHY and Verification IP. CCIX (pronounced “C6”) is an open coherent multichip standard that allows processors based on different instruction set architectures…
At the Linley Processor Conference earlier this week, I had the opportunity to present the challenges facing architects who are building hardware for distributed cloud intelligence. I also
discussed how you can address these challenges with ARM’s 3…
