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  • Arm Corstone Virtual Platforms now Available at no Cost: A Simplified, Faster Route to Successful Secure SoCs

    The Arm Corstone-300 and Corstone-700 FVPs are now available at no cost to easily and instantly start early exploration and software development ahead of silicon availability.

    The success of your System on Chip (SoC) for an IoT device – from endpoint…

  • Development of Arm based systems with Synopsys Virtual Prototyping: Anytime, Anywhere!

    ** Sharing this article from Kamal Desai, Product Marketing Manager at Synopsys

    Around the world thousands of engineers have been asked to work from home. Temporarily gone are the days of global travel, and with it the ‘traditional’ development and global…

  • How to set DBGMCU_CR register on MDK?

    IDE:MDK5.23.0.0

    MCU:STM32F103RET6

    Code generate:STM32CubeMX

    Q1:How to set the DBGMCU_CR register on MDK?

    I tried two solutions to set DBGMCU_CR on MDK, but failed.

    Solution 1

    Add the conf_STM32F103RE.ini file on Options->Debug->Initialization file.…

  • How to set DBGMCU_CR register on MDK?

    IDE:MDK5.23.0.0

    MCU:STM32F103RET6

    Code generate:STM32CubeMX

    Q1:I want to know how to set the DBGMCU_CR register on MDK?

    I tried two solutions to set DBGMCU_CR on MDK, but failed.

    Solution 1

    Add the conf_STM32F103RE.ini file on Options->Debug->Initialization…

  • Is CMX-RTX a thread-based RTOS?

    I am maintaining a 10 yo project which uses ARM9 based STR912 and CMX-RTX as its RTOS.

    The CMX-RTX manual is basically an extraction of the header files without much details. There is even not any introduction of the RTOS methodology at all. It lists…

  • Using CMSIS with Arm Compiler 6, without an IDE

    What is CMSIS?

    The Cortex Microcontroller Software Interface Standard (CMSIS) is a vendor-independent hardware abstraction layer for microcontrollers that are based on Arm Cortex processors. It defines generic tool interfaces and enables consistent device…

  • Pre-silicon Software Development with Arm Models for Cortex-A5 DesignStart

    Arm DesignStart is enhancing the Cortex-A5 package to help custom chip designers to expand market opportunities and develop richer experiences. The new package helps to reduce the development time of Arm-based Linux-capable chips. Designers can now take advantage…

  • Cortex-R5: Divide-by-zero

    Hello,

    I am using Xilinx MpSoc Ultrascale+ ZCU102.

    I want to generate an interrupt when dividing by zero.
    I read the Cortex-R5 technical reference manual (infocenter.arm.com/.../index.jsp
    The system control register C1 has the DZ bit which control the generation…

  • R52 Development Boards

    Hello, 
    I am unable to find boards with R52, is there any board with public availability?
    I only found the NXP GreenBox (for approved customers) :/

    Thanks,
    Alessandro

  • Arm Allinea Studio 19.2: building on Libraries and Arm Compiler for Linux performance

    Arm Allinea Studio 19.2 is now available. This new major release includes valuable updates to the Arm Performance Libraries (Arm PL) and the Arm Compiler for Linux. This new version includes our first attempt at the Arm Opt Report and the introduction…

  • Arm Forge 19.1: Introducing "Forge Ultimate" edition and region profiling capabilities

    Arm Forge 19.1 is now available. This new major version includes the launch of a new Arm Forge Ultimate edition and the introduction of "region profiling", leveraging LLNL's work on Caliper.

    Introduction of Arm Forge Ultimate

    By popular…

  • confusing about procedure of ISR in book "ARM system developer guide"

    Hi, there.

    I'm new to arm family, and please bear with me of asking fundamental questions.

    In book "arm system developers guide-designing and optimizing system software"

    9.1.1 ARM Processor Exceptions and Modes, page 318

    When an exception…

  • Good starterboard, C or Linux etc

    hi all,

    I'm used to use microchip controllers (Professional software engineer), but because I need higher calculation speed, I have to move to arm processors.

    For that reason I'd like to start with a starter kit.

    I'd like to experiment with Ethernet…

  • Stable set of ARM MCU, libraries, and Dev Environment

    Hi,

    I tried to get into this a year ago and ran out of time, here I go again... and I hope this isn't too opinion based, the state of IDEs and libraries should be clear (in flux or stable)

    I'm looking for a stable set of ARM MCU, libraries, and dev…

  • Yocto on AMOS 820 hello world?

    The AMOS 820 seems to be a good fit for a system I'm developing, and installation of the linux BSP and creation of the out-of-the-box image went flawlessly. However, at this point the documentation trails off, before a simple helloworld example for build…

  • stdio.h does not recognize FILE *fpointer

    I am using IAR embedded workbench software for ARM CORTEX M3 controller. I have already included stdio.h library and it have fopen function like this 

    but when i am declaring my file pointer like this

    FILE *fpointer;

    Its giving me these two errors.

    …

  • What is TrustZone for ARMv8-M?

    As a product manager for the Cortex-M33, I see this question pop up a lot. Below is my version of the answer.

    Characteristics of TrustZone technology

    • TrustZone is the security foundation for billions of ARM Cortex-A processor-based systems
    • TrustZone…

  • A couple of use cases for TrustZone for ARMv8-M

    Root of Trust implementation – Connected devices with authentication requirements need a root of trust in the system architecture. This is particularly important for devices that can be updated over the air. In a system with TrustZone technology, code…

  • the means of tail-chaining of interrupts

    hellow

         I am reading the book  “Cortex  -M3 Embedded Software Development” on page of 3,chapter 1.1 Nested Vectored Interrupt Controller (NVIC),

    i don not understand  the means of tail-chaining of interrupts .In the sentence of  "The NVIC also…

  • No segmentation fault when expected with aligned load and store

    Hi all,

    It is a well known fact that performing an aligned vector load with an unaligned memory address should lead to segmentation fault.

    However, when I do try to run code segment below using the same, i do not see any segmentation fault.

    ---------…

  • Choosing the right platform for embedded software development

    Developing software is hard.

    Developing embedded software is even harder.

    Besides contending with traditional pitfalls such as syntax errors like missing colons, logical errors like setting a variable to the wrong value, you are also challenged with complex…

  • What are CMSIS software components?

    The Cortex Microcontroller Software Interface Standard (CMSIS) is a vendor-independent hardware abstraction layer for Arm Cortex-M and Cortex-A processors and defines generic tool interfaces.   

    The CMSIS-Pack standard specifies a delivery mechanism for…

  • Develop Embedded Control Systems Efficiently in MATLAB with Arm Models and Compiler Integration

    Overview

    Developing software involving DSP, control systems, and complex algorithms running on embedded targets is a humbling task. To streamline this often complex and tedious process, Arm has several offerings to help verify & optimize code under development…

  • Shrink Your MCU code size with GCC ARM Embedded 4.7

    GNU Tools for ARM embedded processors, or GCC ARM Embedded for short, version 4.7 is now available.

    The previously released version, 4.6, had more than 30,000 downloads. As well as new features such as MAC OS hosting, GDB enhancement, and other optimizations…

  • No segmentation fault with unaligned access

    Hi all,

    It is a well known fact that performing an aligned vector load with an unaligned memory address should lead to segmentation fault.

    However, when I do try to run code segment below using the same, i do not see any segmentation fault.

    ---------…