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  • Will there be tutorials, videos that explain more details on the design process? Is there a possibility of simulation/test for effectiveness?

    This question was raised in the webinar "Enhance your product with industry-leading processors - for no upfront license fee.”

  • First compile, verilog files missing

    Hi,

    I am just performing the first steps with the DesignStart Eval Edition (Cortex-M0), trying to compile the verilog sources to get a simulation running.

    So I changed /systems/fpga_testbench/trl_sim/makefile to use gcc and modelsim and now I want to …

  • [0x0000000X ORR 0x00010000] results in 0xXXXXXXXX

    Hi,

    I am working on a GPIO IP for Designstart Pro Cortex-M0. Now in my Simulation there are some Read-Modify-Write cycles in order to set only single bits in a 32 bit register.

    If the GPIO register is 0x0000000X and I just want to set bit 16, GCC produces…

  • Cortex-m0 interrupt_demo simulation issue

    Hi,

         I am using Cortex-M0 DesignStart Pro. When I simulation intrrupt_demo test case, I found that IRQ[31:0]  always 0, Is this correct?

         I saw the document , the interrupt_demo is Demonstration of interrupt features, but if no interrupt signal input…

  • Cortex_M0 simulation fail

    Deare

           I am using Cortex-M0 DesignStart Pro. When I use my program to simulation, I found the HADDR from 0, to 4, and the to ffff_fffd8, the  HRDATA is  0x2000_06f8 and 0x800_0159，the HADDR should not be ffff_ffd8，So I think it's unusual, but I don't know…

  • Can a student simulate the free Cortex-M from DesignStart?

    I saw, and tried in the past already, to simulate the Cortex-M0. It does not really matter efficiency, customization and so on, but only the learning process behind a steup for a correct very basic simulation.

    I was trying to setup a Linux machine, when…

  • SWD issue in Cortex-m0

    We are using Cortex-M0 DesignStart Pro to design MCU. When we use SWD to download grogram to flash in FPGA(Cortex_m0 mcu inside),  we cannot to connect keil with FPGA, and Keil shows:" Could not stop Cortex-M device!Please check the JTAG cable. "…

  • Hello testcode on M0 doesn't give desired output

    I am a beginner, trying to run the "hello" testcode on the M0 but when I run the simulation, I am getting the following signals which don't seem to give the relevant UART output for "Hello world".