Hi!
I can simulate ARMv7 assembly code with Keil, however, I cannot simulate ARMv8. Do you know if that is possible?
Many thanks,
Carlos
Hi,
When I try to start "FVP_MPS2_Cortex-M55" I get the following error:
```
telnetterminal0: Listening for serial connection on port 5000telnetterminal1: Listening for serial connection on port 5001telnetterminal2: Listening for serial connection…
Hello folks,
I have downloaded the ARM M3 designstart eval package and have the licensed mentor questasim simulator.
As per the quick start guide, I am able to run the hello and uart_tests example on the mentor questasim simulator with DSM=no option.
I need to publish a payload from mbed-os to MQTT broker. I am using FVP_MPS2_M7 as target, code is getting compiled but while running it on simulator(FVP_MPS2_Cortex-M7.exe) am getting an error code -3001 but when I use FVP_MPS2_M3 as target and…
In the previous post, Getting started with Fast Models and RTX, we created a custom Cortex-M33-based platform using the IP Components already available in the Fast Models IP Library. Most times you would want to add your own IP to the design and create a…
Hello,
I'm newbie in Keil and mVision. I would like to know if it is possible to simulate a KL25Z in mVision because I need to run some tests but I forgot my board at office.
Thanks.
I am tasked for with checking for valid UPC codes for a school assignment using ARM. I have no prior experience with assembly. After I am able to load the registers with the UPC code I am having trouble figuring out how I am to skip over the required digits…
I want to simulate performance of a code uses ADC module in MKL25Z board using Keil uVision5 simulator , this requires supplying virtual signal to one of its ADC channels , i tried adding variables to logic analyzer ( AD0 , AD00 ) but it gave me "Unknown…
I tried using variable names ( AD0 , Ain0 ) non of them was identified in Keil's logic analyzer , and also non of VTREG signals was related to ADxx ( Update : discussion moved to https://community.arm.com/developer/tools-software/tools/f/keil-forum…
Can we do MATLAB simulation or by KEIL software Pv cell connected to a grid without a transformer to reduce leakage current ? Please let me know if possible
Dear madam/sir,
I am looking for a C/SystemC model of the 8051uC hardware (m8051ew from Mentor) that I can use for system simulations.
Does Keil/ARM provide such a model?
If not, does anybody know where I can find such a model?
Thanks in advance for…
I'm trying to boot a simple binary on SGI-575 but unable to get expected result. To load and run application, I used following commands:
# When load address is 0x00000000 $ ./FVP_CSS_SGI-575 -a css.cluster0.cpu0=/home/user/DS-5-Workspace/HelloWorld…
I am using the Cycle-accurate ARMv6-M simulator provided here: https://github.com/impedimentToProgress/thumbulator to run benchmark programs provided on the following link: https://github.com/impedimentToProgress/MiBench2
I want to verify the output of the…
Hi all,
I am a master student in germany and doing my thesis currently. I wanted to measure CPU cycles using emulation/simulation for some code that is running on a cortex m4F processor based board. I had QEMU in mind at initial but it turns out it doesn…
This question was raised in the webinar "Enhance your product with industry-leading processors - for no upfront license fee.”
I have received the PSN and followed the Step-by-step guide. Then I got the license.lic file and created ARMLMD_LICENSE_FILE environment. But I cannot pass the HELLO TEST simulation with Cycle Model (DSM=yes).
I am just performing the first steps with the DesignStart Eval Edition (Cortex-M0), trying to compile the verilog sources to get a simulation running.
So I changed /systems/fpga_testbench/trl_sim/makefile to use gcc and modelsim and now I want to …
Dear all
I encounter a confusion that I compile a piece a c code and generate HEX file( as instruction rom's initialization file) which is download to the fpga whit the cortex m3 prototype of Verilog code .but the M3 system can't run itself .when I…
I am working on a GPIO IP for Designstart Pro Cortex-M0. Now in my Simulation there are some Read-Modify-Write cycles in order to set only single bits in a 32 bit register.
If the GPIO register is 0x0000000X and I just want to set bit 16, GCC produces…
I am using Cortex-M0 DesignStart Pro. When I simulation intrrupt_demo test case, I found that IRQ[31:0] always 0, Is this correct?
I saw the document , the interrupt_demo is Demonstration of interrupt features, but if no interrupt signal input…
Deare
I am using Cortex-M0 DesignStart Pro. When I use my program to simulation, I found the HADDR from 0, to 4, and the to ffff_fffd8, the HRDATA is 0x2000_06f8 and 0x800_0159，the HADDR should not be ffff_ffd8，So I think it's unusual, but I don't know…
We are using Cortex-M0 DesignStart Pro to design MCU. When we use SWD to download grogram to flash in FPGA(Cortex_m0 mcu inside), we cannot to connect keil with FPGA, and Keil shows:" Could not stop Cortex-M device!Please check the JTAG cable. "…
I am a beginner, trying to run the "hello" testcode on the M0 but when I run the simulation, I am getting the following signals which don't seem to give the relevant UART output for "Hello world".
I'd like to try and use external BRAM as the I/D memory for the Cortex-M1 DesignStart package for Xilinx FPGAs. The reference examples for Arty boards use the internal TCMs.
I've built a design in Vivado with a BRAM connected to the AXI3 port mapped…
is there some guide which shows how to run a Keil hex mage for Cortex M3 in Modelsim?
To be more specific, I want to run an interactive simulation in Modelsim of my Cortex M3 design and associated software to analyse timings of CPU instructions and…