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  • Simulate Cortex-M0 FPGA implementation in ModelSim

    Hello, I started to tinker with the most basic Cortex-M0 from the DesignStart.
    I am using Modelsim Student Edition, which run only on Windows (or Linux through Wine).

    I tried to start with Linux to see if at least the "make" commands are working. Problem…

  • First compile, verilog files missing

    Hi,

    I am just performing the first steps with the DesignStart Eval Edition (Cortex-M0), trying to compile the verilog sources to get a simulation running.

    So I changed /systems/fpga_testbench/trl_sim/makefile to use gcc and modelsim and now I want to …

  • ARM CortexM3 Designstart on the fpga can't run the compiled c code itself

    Dear all

    I encounter a confusion that  I compile a piece a c code and generate HEX file( as instruction rom's initialization file) which is download to the fpga whit the cortex m3 prototype of Verilog code .but the M3 system can't run itself .when I…

  • Modelsim for CM3 path error

    Hi,

    I want to simulate CM3 Designstart with Modelsim.

    When I launch Modelsim from Quartus 17.2 most of the files compile. But I get the following error:

    ** Error: C:/projects/AT421-MN-80001-r0p0-02rel0/smm/logical/smm_common_fpga/verilog/fpga_pll_speed…