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  • Cortex-M0 DesignStart Prototyping kit makefiles

    Unlike the Design kit makefiles, in which tool-chain (Keil, DS5 or GCC) can be chosen, the Prototyping kit makefiles uses only DS5.

    Is it possible to receive Prototyping kit makefiles that support tool-chain selection and in particular GCC?

  • First compile, verilog files missing

    Hi,

    I am just performing the first steps with the DesignStart Eval Edition (Cortex-M0), trying to compile the verilog sources to get a simulation running.

    So I changed /systems/fpga_testbench/trl_sim/makefile to use gcc and modelsim and now I want to …

  • Program MPS2 with .axf file

    Hi,

    I am using the MPS2+ board to debug my DesignStart Cortex-M0. The core is up and running and now I want to program the onboard SRAM. On the SDCard I can see that \MB\HBIO263C\AN387\images.txt expects an axf file.

    Is it possible to generate an .axf…

  • [0x0000000X ORR 0x00010000] results in 0xXXXXXXXX

    Hi,

    I am working on a GPIO IP for Designstart Pro Cortex-M0. Now in my Simulation there are some Read-Modify-Write cycles in order to set only single bits in a 32 bit register.

    If the GPIO register is 0x0000000X and I just want to set bit 16, GCC produces…

  • External BRAM as I/D memory for Cortex-M1 DesignStart package for Xilinx FPGAs

    Hi,

    I'd like to try and use external BRAM as the I/D memory for the Cortex-M1 DesignStart package for Xilinx FPGAs. The reference examples for Arty boards use the internal TCMs.

    I've built a design in Vivado with a BRAM connected to the AXI3 port mapped…