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  • Is it possible to interface a high frequency sensor-signal output from an analog ASIC chip (e.g. several Kilohertz) using Cortex-M?

    This question was raised in the ‘Want to maximise your product design? See how a custom ASIC can help?' webinar, view all the questions in the round-up blog post.

  • Can SoC Verification be automated using Machine Learning? If so, how can we ensure 100% functional coverage?

    This question was raised in the ‘Want to maximise your product design? See how a custom ASIC can help?' webinar, view all the questions in the round-up blog post.

  • Are DesignStart Pro royalties based on the number of cores instantiated in single chip? If so, what about permanent lockstep configurations?

    This question was raised in the webinar "Enhance your product with industry-leading processors - for no upfront license fee.”

  • What ASIL level can be achieved with the Cortex-M3 processor?

    This question was raised in the webinar "Enhance your product with industry-leading processors - for no upfront license fee.”

  • Has anyone had problems with implementing App Note AN387 using Cortex M0 r2p0 on a Cortex-M + dev board?

    All,

    I received the Versatile Express Cortex-M Prototyping System + and am using DesignStart. I powered on the board and the operating system booted up without any problems.

    In the V2M_MPS2/MB/HBI0263C/board.txt file, the following are the sequence of…

  • Cortex M3 on Arty A35T with Vivado 2018.3 Windows 10

    Hi. First of all, thanks for your attention in advance. I have to say that I am completely new in FPGA programming, but I could have never imagined that running an example with a documentation explaining it step by step could be so cumbersome and error…