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  • I am an FPGA SoC engineer and I want to create a custom SoC. Is it possible for me to learn and acquire the development flow for less than 5K EUR budget – and if so, how should I proceed?

    This question was raised in the ‘Want to maximise your product design? See how a custom ASIC can help?' webinar, view all the questions in the round-up blog post.

  • ‘Low cost’ is a benefit of custom SoCs. At what quantities do the low-cost benefits start to come in, relative to, for example, digital/analog designs based upon off-the-shelf devices?

    This question was raised in the ‘Want to maximise your product design? See how a custom ASIC can help?' webinar, view all the questions in the round-up blog post.

  • With regards to custom SoCs, what is the trade-off between low cost and performance?

    This question was raised in the ‘Want to maximise your product design? See how a custom ASIC can help?' webinar, view all the questions in the round-up blog post.

  • Is it possible to interface a high frequency sensor-signal output from an analog ASIC chip (e.g. several Kilohertz) using Cortex-M?

    This question was raised in the ‘Want to maximise your product design? See how a custom ASIC can help?' webinar, view all the questions in the round-up blog post.

  • Can SoC Verification be automated using Machine Learning? If so, how can we ensure 100% functional coverage?

    This question was raised in the ‘Want to maximise your product design? See how a custom ASIC can help?' webinar, view all the questions in the round-up blog post.

  • How is the SoC-based design validated? Is it done against some specifications or compliance?

    This question was raised in the ‘Want to maximise your product design? See how a custom ASIC can help?' webinar, view all the questions in the round-up blog post.

  • Assuming knowledge of standard off-the-shelf SoC and FPGA designs, what big challenges exists for an integrated solution?

    This question was raised in the ‘Want to maximise your product design? See how a custom ASIC can help?' webinar, view all the questions in the round-up blog post.

  • What is the maximum running frequency for Cortex-M3 on TSMC 40nm process?

    This question was raised in the webinar "Enhance your product with industry-leading processors - for no upfront license fee.”

  • Cortex M3 on Arty A35T with Vivado 2018.3 Windows 10

    Hi. First of all, thanks for your attention in advance. I have to say that I am completely new in FPGA programming, but I could have never imagined that running an example with a documentation explaining it step by step could be so cumbersome and error…