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  • about tail chaning of Cortex-M0

    Hello.

    I'm studying about the tail chaining of Cortex-M0.

    Is it same as Cortex-M3 or M4?

    Best regards.

  • cmsis NVIC question.

    Hello, Everybody. I have several questions.

    1. Please See the NVIC_Type structure. I don't understand about why ISER,ICER,ISPR and ICPR use size of array 1( I think It can use just __IO uint32_t ISER; ), and what does RESERVEDs do???

    2. I would like…

  • How long bitfields on which ARM?

    I need to be able to handle long bitfields as effectively as possible. Right now I need up to 64 bits in length.

    Are there instructions to set, clear and test individual bits in one cycle available for some of the architectures? Which? Particularly, will…

  • Where to find the execution cycles of Cortex m7 instruction

    for Cortex-M0, M3 and M4, I can find the execution time in their Technical Reference Manual > Programmers Model > Instruction set summary 里面查看

    http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0432c/CHDCICDF.html

    but for M7 It said that…

  • V2M MPS2+: 'ERROR: FPGA did not configure.'

    Hi all,

    We have purchased an MPS2+ platform, and everything was going well, but since Friday we are facing an error we do not understand.

    When starting the FPGA configuration (by pressing the 'ON' button on the board), leds start blinking (the screen…

  • Question about the Pipeline, clock cycle and machine cycle in Cortex-M Series.

    Recently I'm learning the implement of ARM cortex m core in order to optimize my software to be more efficient and be easier to predict its execute time. But now I'm confused about the clock cycle, machine cycle and the pipeline of cortex-m.

    …

  • Why is SoC Design so hard?

    The exploding IoT (Internet of Things) chip market is expected to reach 20 billion devices by 2020 by many predictions. The majority of these will NOT be wearables. 

     

    The IoT market will be driven by Data and Subscription business models. THOUSANDS of…

  • Loop unrolling on Cortex-M3 vs. Cortex-M0

    In the DSP lib files like arm_conv_f32, arm_fir_f32, the algorithm implementation in Cortex-M3/M4 and in Cortex-M0 is different. i.e., loop unrolling is used in M3/M4 and it is not used in M0.

    Pls tell me the reason behind it. Is there any advantage of…

  • 恩智浦（NXP）的LPC系列MCU新亮点

    昨天阿Ben抽了半天时间去参加了在上海的NXP MCU（微控制器，单片机） RoadShow，地点在火车站边上的浦西洲际酒店。请让我给大家分享一下看到LPC系列MCU新亮点。

    20140528_124151.jpg

    昨天的Roadshow吸引了120名左右的在上海的工程师和相关行业内人员参加，我到的早，占据了一个中间前排的位置。

    大家知道，NXP 以及其前身飞利浦是老牌的MCU供应商，据他们昨天参会的战略市场VP Lam女士介绍已经有39年的MCU业务历史，更重要是，他们24年前就开始使用ARM的相关架构进行MCU的研发和生产。他们的LPC系列MCU产品在国内一直享有很好的口碑…

  • Cortex-M Prototyping System, new development board from ARM

    Hi I'm very excited to announce of the release of a new product we have been working on for the last few months called the Cortex-M Prototyping System, as part of the Versatile Express family of products. This development board is targeted at the evaluation…

  • From “Which Cortex-M processor” to “Which C compiler”

    In my presentation at ARM TechCon 2013 last week "ARM Cortex-M for Beginners", someone asked a question of “Is there any advice for getting the best performance? Which C compiler to use?

    This is a very interesting question. One page of…

  • ARM Technical Tutorial Video - Cortex-M Series

    I saw what looks like the start of a series of short videos on the ARMflix YouTube channel.

    Of course, it doesn't go into much details, but I thought it was a simple way to discover the series.

    As they come up, anyone please feel free to edit this…