Hi, I am trying to find out where exactly the soft floating point code used in eabi for a M0+ comes from. When i compile a program using floating point using gcc_eabi, it generates code to carry out this operation. ( code included).
I downloaded the…
I've the following implementation for a svc exception handler on a cortex-m0: int __attribute__((naked)) sv_call_handler(uint32_t n, uint32_t arg1, uint32_t arg2, uint32_t arg3, uint32_t arg4, uint32_t arg5) { irq_off();When I built it for cortex…
Unlike the Design kit makefiles, in which tool-chain (Keil, DS5 or GCC) can be chosen, the Prototyping kit makefiles uses only DS5.
Is it possible to receive Prototyping kit makefiles that support tool-chain selection and in particular GCC?
Hi,
I am just performing the first steps with the DesignStart Eval Edition (Cortex-M0), trying to compile the verilog sources to get a simulation running.
So I changed /systems/fpga_testbench/trl_sim/makefile to use gcc and modelsim and now I want to …
I am using the MPS2+ board to debug my DesignStart Cortex-M0. The core is up and running and now I want to program the onboard SRAM. On the SDCard I can see that \MB\HBIO263C\AN387\images.txt expects an axf file.
Is it possible to generate an .axf…
I am working on a GPIO IP for Designstart Pro Cortex-M0. Now in my Simulation there are some Read-Modify-Write cycles in order to set only single bits in a 32 bit register.
If the GPIO register is 0x0000000X and I just want to set bit 16, GCC produces…
Overview of stack size requirement estimations in Cortex-M based applications
“How much stack memory do I need for this application?” - This is a common question for many software developers working on applications that run on microcontroller…