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  • STM32H745 dual-core debugging with IAR toolchain

    Hi All!

     

    I am working on STM32H745 dual-core controller and IAR Embedded Workbench for ARM toolchain V8.40.1 for development.

    I have completed all my work on individual core test and debugging with help of ST-Link V3 as debugger but unfortunately, I am…

  • Suggestion on suitable arm processor

    Hi all. Nice to meet you all and glad that I have a chance to join this group=)
    Recently, I will do my final year project with the title of "Smart Home Control Using Brain Wave". Yet, I am not really sure on which arm that I should choose><…

  • Parallelism between CPU and FPU

    Hi.

    I have a question regarding Cortex-M4 processor with floating point unit. Is it somehow possible to do some computation in parallel in CPU (with integers) and FPU (with floats)?

    Probably not, because both units need their own instructions to perform…

  • How long bitfields on which ARM?

    I need to be able to handle long bitfields as effectively as possible. Right now I need up to 64 bits in length.

    Are there instructions to set, clear and test individual bits in one cycle available for some of the architectures? Which? Particularly, will…

  • Cortex-M7 "zero overhead loop"

    Hi.

    In the page 22 of the document below informs that the cortex-m7 has "zero overhead loops" capability. I would like to know how it is done? Is there a special instruction for it?

    http://community.arm.com/servlet/JiveServlet/downloadBody/9595…

  • What is the advantage of floating point of CM7 versus CM4

    Hi all,

    I did some of the investigation based on comparison of FPU based algorithms on CM4 and CM7 cores. All the code/data were placed into the single cycle memory with full utilization of modified / true Harvard architecture, it means:

    - on CM4 - code…

  • DSB command for external Nor-Flash memory (Cortex-M7)

    Good afternoon, dear collegs! 

    I'v started to connect STM32H7 (Cortex M7) MCU with exteranal Nor-Flash memory by use FMC. I'm alittle confused by write command. Without DSB() command it refuses to work correct. Program loads from embedded Flash (7 waitstaits…

  • Where to find the execution cycles of Cortex m7 instruction

    for Cortex-M0, M3 and M4, I can find the execution time in their Technical Reference Manual > Programmers Model > Instruction set summary 里面查看

    http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0432c/CHDCICDF.html

    but for M7 It said that…

  • When will be the Release of "The Definitive Guide to Cortex M7" ??

    Hi Sir,

    may be the title of this question looks fun, but i am eagerly waiting for your next book "The Definitive Guide to Cortex M7" are you working on this book?? When could i Expect this book

    Thanks and Regards,

    Harshan.

  • DMB, DSB, ISB on Cortex M3,M4,M7 Single Core parts

    I have been reading through the ARM documentation on memory and instruction barriers. 

    I have read that the single core ARMv7-M parts do not reorder instructions, as such the DSB and ISB are not needed, is this correct? 

    I have also read the same about…

  • Looking for typical max frequency for Cortex-M CPUs

    I'm looking for information on the typical max frequency (or typical frequency range) for the Cortex-M cores, in 40nm. Is there any documentation on that? Thanks.

  • Raising priority of PendSV within NVIC when PendSV pending

    Hi,

    I'm trying to understand the behavior of raising (lowering numerical priority) the priority of PendSV in the NVIC of a Cortex M4 or M7 when PendSV is already pending. Below are the cases I'm grappling with,

    1) High priority interrupt ISR is…

  • When an exception is taken into account

    Hi

    Related to ARMv7-M architecture:

    I am searching through all infocenter documents but still cannot find anything and answer this question: "When an exception is taken into account?" I mean, are exceptions only serviced after the current instruction…

  • LDREX/STREX on the M3,M4,M7

    Doing some research of the LDREX and STREX it appears that the exclusivity address range for these instructions on the M3,M4,M7 is the entire memory space. Hence you can only use the LDREX/STREX with one address.   Does this not limit you to one Mutex …

  • An algorithm on a M7 is slower than on M4 - why?

    Hi there,

    we are working on an audio project, where we move some firmware from an STM32F407 (ARM Cortex M4) to an ATSAME70 (ARM Cortex M7). Despite the ATSAME70 runing at 300 MHz, while the STM32F407 runs at only 168 MHz, the ATSAME70 is definitely slower…

  • Question about the Pipeline, clock cycle and machine cycle in Cortex-M Series.

    Recently I'm learning the implement of ARM cortex m core in order to optimize my software to be more efficient and be easier to predict its execute time. But now I'm confused about the clock cycle, machine cycle and the pipeline of cortex-m.

    …

  • Machine learning in low-power devices brings sound recognition to the smart home market

    The Smart Home market is now at an inflection point. Early devices in the market were connected to the internet but were typically single-function, often lacking connectivity to other devices and with closed APIs, denying the user the ability to design…

  • Cortex-M processors in DSP applications. Why not?

    Have you ever been in a situation where you successfully validated your algorithm and asked yourself: is there a hardware platform with DSP capabilities so I can get my embedded project to market quickly? Guess what: other people have dealt with the…

  • 这可不是上一代的 MCU

    嵌入式设计领域在四年之间可以有千变万化；作为回应，ARM 推出了 ARM® Cortex®-M7 处理器，与 2010 年发布 Cortex-M4 相隔也不算远。
    撰稿人：（特约编辑）carolinehayes

    ARM 的 Cortex-M4 将 DSP 引入微处理器中；但按照 ARM 嵌入式业务副总裁 Richard York 所述，后来的 Cortex-M7 需要另一种方式提高性能。他这样解释道：“Cortex-M7 在硅晶片上的局限较少，其性能得到了提高（与 Cortex…

  • 让下一代智能互联嵌入式应用开发更简化

    （编者按：本文最初发表于2015年2月的RTC Magazine，现按照最新产品信息进行了更新）

    Cortex-M 处理器家族是一系列具有扩展性，兼容性，节能和易于使用的处理器，旨在帮助开发人员满足未来智能互联嵌入式应用的需要。2010年推出的 Cortex-M4是建立在Cortex-M3的基础上并加入了一系列专门为数字信号处理定制的指令集扩展，并搭配可选的性能可达1.25 DMIPS/ MHz的单精度浮点单元。自推出以来，有10家以上的半导体厂商推出了基于Cortex-M4的通用MCU产品，以…

  • Embedded World 2015 - Design of SoC for High Reliability Systems with Embedded Processors

    This is a paper published in Embedded World 2015, covering various areas about how chip designers can improve the reliability of a SoC (System-on-Chip) design. It also cover various functional safety related features in the Cortex-M7 processor, as well…

    • Embedded SoC Design for High Reliability Systems 1.02.pdf

  • How much stack memory do I need for my Arm Cortex-M applications?

    Overview of stack size requirement estimations in Cortex-M based applications

    1 - Overview

    “How much stack memory do I need for this application?” - This is a common question for many software developers working on applications that run on microcontroller…

  • NEW App Note: Migrating Application Code from ARM Cortex-M4 to Cortex-M7 Processors

    The Cortex-M7 processor design is based on the ARMv7-M architecture. It supports all the instructions available on the Cortex-M4 processor and uses the same exception model for interrupt handling. In most cases, program code written for a Cortex-M4 processor…

    • Migrating Cortex-M4 Applications to Cortex-M7.pdf