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  • How long bitfields on which ARM?

    I need to be able to handle long bitfields as effectively as possible. Right now I need up to 64 bits in length.

    Are there instructions to set, clear and test individual bits in one cycle available for some of the architectures? Which? Particularly, will…

  • Where to find the execution cycles of Cortex m7 instruction

    for Cortex-M0, M3 and M4, I can find the execution time in their Technical Reference Manual > Programmers Model > Instruction set summary 里面查看

    http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0432c/CHDCICDF.html

    but for M7 It said that…

  • When will be the Release of "The Definitive Guide to Cortex M7" ??

    Hi Sir,

    may be the title of this question looks fun, but i am eagerly waiting for your next book "The Definitive Guide to Cortex M7" are you working on this book?? When could i Expect this book

    Thanks and Regards,

    Harshan.

  • DMB, DSB, ISB on Cortex M3,M4,M7 Single Core parts

    I have been reading through the ARM documentation on memory and instruction barriers. 

    I have read that the single core ARMv7-M parts do not reorder instructions, as such the DSB and ISB are not needed, is this correct? 

    I have also read the same about…

  • When an exception is taken into account

    Hi

    Related to ARMv7-M architecture:

    I am searching through all infocenter documents but still cannot find anything and answer this question: "When an exception is taken into account?" I mean, are exceptions only serviced after the current instruction…

  • LDREX/STREX on the M3,M4,M7

    Doing some research of the LDREX and STREX it appears that the exclusivity address range for these instructions on the M3,M4,M7 is the entire memory space. Hence you can only use the LDREX/STREX with one address.   Does this not limit you to one Mutex …

  • how dose the PC run to startup.s when the mcu reset

    Hi，dear enginner：

        i want to know how the PC run to startup.s when mcu reset？

       The Definitive Guide to the ARM Cortex-M3 says address 0x00000000 is MSP‘，address 0x00000004 is ResetVector.

       But when I look at STM32F767, I find that 0x00000000 and…

  • Question about the Pipeline, clock cycle and machine cycle in Cortex-M Series.

    Recently I'm learning the implement of ARM cortex m core in order to optimize my software to be more efficient and be easier to predict its execute time. But now I'm confused about the clock cycle, machine cycle and the pipeline of cortex-m.

    …

  • Embedded World 2015 - Design of SoC for High Reliability Systems with Embedded Processors

    This is a paper published in Embedded World 2015, covering various areas about how chip designers can improve the reliability of a SoC (System-on-Chip) design. It also cover various functional safety related features in the Cortex-M7 processor, as well…

    • Embedded SoC Design for High Reliability Systems 1.02.pdf