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  • Question on clock gating for AHB -lite bus matrix for CM4 based system

    Joseph,

    We are using CM4 and AHB -lite bus components from ARM system development kit. We have 3 different AHB masters in the system, including CM4.

    I am wondering if we could use HTRANS from each master and combined that information to gate the AHB-lite…

  • Variation in the current consumption due to memory address and offset value?

    Hello to all,

     

    I am trying to figure out the variation in current consumption as well as in clock cycles due to different memory regions and different offsets. During various experiments, I have found the following results:

     

    LDR R4,[R1,#0x0]  (R1 = 0x00000000…