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  • ARM Cortex ICode, DCode, System buses

    Note: This was originally posted on 26th February 2009 at http://forums.arm.com

    I'm a bit confused about the bus structure and memory model of ARM Cortex M3. First of all, does Cortex M3 actually have 3 physically separate buses coming out of it?
  • instructions fetch

    Hello, when I use stm32f103xx, I am confused of  one of the boot modes it supported. One of  the boot modes is booting from embedded SRAM while the I-BUS of Cortex-M3 is connected to FLASH only . When boots from SRAM,  how Cortex-M3 fetches instructions…

  • How to Debug CM3 DesignStart in the FPGA

    I use the ARM Cortex-M3 DesignStart Eval on the FPGA platform, I use J-link to download the program to the system but the system is not properly implemented. I downloaded the generated Hex file via J-link to the FPGA development board via Keil. Is the…