Below are some useful links related to the Beetle IoT evaluation board
Hello:
I'm going to test uSDCARD read/program function via external SPI connector of MPS2 board.
Can you please tell me where I can download the test code and documents?
Thanks
Jimmy
Hi all,
We have purchased an MPS2+ platform, and everything was going well, but since Friday we are facing an error we do not understand.
When starting the FPGA configuration (by pressing the 'ON' button on the board), leds start blinking (the screen…
Can you please update where can we purchase this board? I've checked with several distis, it is out of stock for all of them (I checked with 4 distributers)
We started working on a daughter card we want to connect via the expansion ports, and we trying to understand the 52 IOs of the two expansion ports frequency capabilities (Board aspect) , is there any information regarding it ?
Are there any schematics…
Hi,
I'm trying to build the MPS2 FPGA project (unmodified, as it is supplied in the kit) and constantly getting an error message saying "Quartus Prime Software quit unexpectedly".
It always crashes at the "Partition Merge" stage after…
After compiling the MPS2+ FPGA designstart project (unmodified, as-is out of the box), i'm failing to run it on the FPGA.
While the already downloaded image that arrives on the FPGA runs fine (i run the demo application), the image I compiled…
Is it possible to directly program the FPGA in the MPS2+ board with the Altera Quartus Programmer?
As far as I understand is the MPS2+ 10 Pin FJTAG port not compatible to the Alter USB blaster.
Is there another way to do this?
Hello,
I want to use an USB Blaster cable for rapid FPGA prototyping on the MPS2+.
The cables differ very much in price. Is it recommended to buy an original Altera for over 200 Euro or can I use a cheaper nonamee one?
Could you please recommend a cable…
I assembled the uSD reader on the SPI slot and put the uSD card in. But the test 5 (SSP) always fails. Status of SSD reads 0xFF.
All other tests are running fine. Do I have to make some additional preparation for a proper working of the the uSD card…
I need more RAM size on MSP2 board.
in Keil uVison 5, I add a simple code to write then read testing.
//-------------------------------------------------------
ram_addr=(volatile uint32_t *)(0x20400000); for (j=0; j<1024; j++) { *ram_addr…
Hello expert:
In MSP2+ board, I found a micro USB connector and some ARM debugger connectors. Can I configure FPGA and run DS-5 using the same micro USB?
This is an update to the fimware for the MCC on the MPS2+ board. This adds some features for improved compatibility with the Mbed OS software examples and continuous integration flow. You do not need to install the update unless you are working with Mbed…
hi, GUys
i buy a mps+2 board and try to implement mbed_blinky examples. but i meet issues on debugger and download axf files.
now i can:
1. export mbed_blinky examples for keil
2. compile success and generate axf file
3. download fail
I'm trying to connect the DesignStart Eval System to the BME280 Environmental Sensor via SPI. I used the SPI Shield0 Pins (EXP[11 to 14]) to set the connection and activated alternate functions in uVision for these pins. But how can I set up the…
I am new to design start. I have just received the MPS2 board. We have a multi core SOC design and I wanted to know hoe to program the individual cores via .axf files.
Is it possible to use MPS2+ with OpenOCD and GDB ?
If so, can you please provide config files for OpenOCD ?
Thank you!
If you are a microcontroller / SoC / ASIC designer working on Cortex-M processor based systems looking for an FPGA board for prototyping, I have a great news for you: ARM has released a new FPGA board called the Cortex-M Prototyping System.
I am currently in Evaluation phase of ARM Design Kits.I am using the exact steps present in arm_cortex_m3_designstart_eval_rtl_and_fpga_quick_start_guide to compile the RTL and run the tests.But, unfortunately after compiling the RTL I am getting a stack…
I am currently in Evaluation phase of ARM Design Kits.I am using the exact steps present in arm_cortex_m3_designstart_eval_rtl_and_fpga_quick_start_guide_100895_0000_00_en.pdfto compile the RTL and run the tests.But, unfortunately after compiling the…