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  • aarch64 Exception Level Sw itch from EL1 to EL0

    Hi Expert,

    I am working on a simple kernel and test it on Qemu which supports RasPi3. During the boot level. Ras Pi goes to EL3 level, and I set spsr_el3 to 1 and elr_el3 to kernel_main and then use eret to enter EL1 mode. My problem is I create a kernel…

  • Vector Table for ARMv8 (cortex A57)

    Hi,

     

    How do i configure vector table for cortex A-57?

    From the documents - "The vector table has 16 entries, with each entry being 128 bytes (32 instructions) in size. The table effectively consists of 4 sets of 4 entries"

    Also " Virtual…

  • ARMv8 Exception level on Startup

    Hi,

    When i power on a ARM cortex A57, How many of the 4 Exception levels will be supported?

    How can i set such that only exception levels EL0 and EL1 are supported in my program? How can i activate each exception levels?

    I have to set it such that normally…