Hi,
I am trying to setup timer at EL1 level and not able to write to CNTP_CVAL register.
I would like to know what is the meaning of "Config-RW" ? It means can be configured ? eg. to be accessed from (NS) EL1 mode ?
If so what/how to configure…
Hi experts,
I'm using a Juno r1 board for some cache-related research experiment so I'm studying the related memory attributes such as cacheability and shareability.
I found the manual mentioned that: " the division between inner and outer is…
I am working on Juno and I am using SCTLR_EL1 reset value based on A53 spec is = 0x00C50838
but If I look to ARMv8 spec it shows some reserved bits as 1 and considering that reset values = 0x30D50800.
I am seeing some MMU random behavior at EL1 based…
I am facing an issue where I am setting timer at Guest EL1 (NS) mode and trying to route this interrupt to EL2.
I do see that when timer expires the interrupt is pending (using generic timer PPI 30) in GICD_ISPENDR (bit 30 set) but control reaches to…
I am doing "eret" from EL2h mode and expecting that I should jump to EL1h mode but rather it is taking me to EL0t mode.
I am trying to root cause the issue but not able to figure out. Any pointers will be helpful ?
Thanks
I am trying to check cache line for an address by connecting Juno with DS-5 but I get "No tables available".
I also changed DTSL configuration editor settings by enabling both options bust still can not see any thing.
I also tried running directly…
We are interested in developing Board Support Package and Bootloader code for SOCs based on ARMv8 Architecture (A57/A53). Can someone please suggest is Juno Board a good option for it?
We are interested in writing the BSP code for Memory Controller, UART…