Browse By Tags

  • How to measure program execution time in ARM Cortex-A53 processor?

    Hi,

    I was using following method to read clock in cortex-a15:

           static void readticks(unsigned int *result)

            {

                struct timeval t;…

  • Armv8 Memory Mapping

    I am looking to emulate an Apple II and would like to specify some address ranges as being memory mapped so that any access would result in perhaps an interrupt that I am then able to handle and in which I can determine the memory address being accessed…

  • Why linux set memory as inner shareable in multi-cluster ARMv8 cores?

    Hi, 

    I have board with two clusters, one has 4*A57 cores, and the other has 4*A53 cores.

    The A57 cluster has its own L1 and L2 cache, A53 cluster also has its own L1 and L2 cache. Between the clusters there is a CCI.

    There is no L3 cache. So the memory…

  • Porting to Arm 64-bit

    This white paper is an introduction to porting existing code to the A64 instruction set supported by Armv8-A processors like the Cortex-A53 and Cortex-A57 from Arm. It will also be useful for those writing new code for these platforms.

    Why 64-bit?

    Diagram of evolution of Arm architecture

    …
    • Porting to ARM 64-bit v4(2).pdf

  • Is Juno Board suitable for ARM BSP development?

    We are interested in developing Board Support Package and Bootloader code for SOCs based on ARMv8 Architecture (A57/A53). Can someone please suggest is Juno Board a good option for it?

    We are interested in writing the BSP code for Memory Controller, UART…

  • ARM Shares Updated Cortex-A53/A57 Performance Expectations

    1.jpg

    With the first Cortex-A53 based SoCs due to ship in the coming months, and Cortex-A57 based designs to follow early next year, ARM gave us a quick update on performance expectations for both cores. Given the timing of both designs we'll see a combination…

  • A Walk Through the Cortex-A Mobile Roadmap

    Chinese Version中文版

    Introduction

    The ARM Cortex-A mobile application processor product line spans several generations and three main product tiers. Developers and SoC designers experienced with one or more of the newer ARM ARM Processors benefit from an…

  • High efficiency, midrange or high performance Cortex-A - What is the difference?

    A question that I am asked many times is – what is the fundamental difference between the high efficiency, mid range and the high performance application processors in the ARM Cortex family?

    The simple answer to this is – the power budget…