I believe that many of us are interested in the ARM Cortex-M7.
Recently, jyiu posted a status update, where I asked a couple of questions about the architecture.
A few questions on the subject was also asked in the Interview and Question Time with Joseph…
what are the minimum hardware requirements to setup wifi on arm-7 processors.
Hello,
I am looking to do a moving average function using DSP instructions of ARM Cortex M7. Unfortunately I couldn't find a direct example. My goal is to have variables for
- the sum
- the new value
- the oldest value
Then the algorithm is sum =…
The ARMv7-M reference manual notes there eight ITM trace enable registers called ITM_TER0 to ITM_TER7. However, core_cm7.h only has one ITM_TER register. Can you clarify? Is it an error in core_cm7.h?
I have been reading through the ARM documentation on memory and instruction barriers.
I have read that the single core ARMv7-M parts do not reorder instructions, as such the DSB and ISB are not needed, is this correct?
I have also read the same about…
Hi,
I have a question regarding BASEPRI, BASEPRI_MAX, and DMBs as they relate to both the V7-M and V7E-M architectures.
Let's say I have the following assembly,
// stuff mrs r0, BASEPRI msr BASEPRI_MAX, #3 // more stuff
Is it necessary to put a…
Hi
Related to ARMv7-M architecture:
I am searching through all infocenter documents but still cannot find anything and answer this question: "When an exception is taken into account?" I mean, are exceptions only serviced after the current instruction…
Hello people. I'm trying to do libgcc extraction for hard FPU's for k70 tower board. However, when I look at the libgcc library for arm targets, I find armv7-m, armv7e-m and armv7e-m-pic. I'm able to deduce from the armv7-m reference manual that the difference…
Has an updated v7m architecture reference been published yet?