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  • Secure SPI : STM32MP157-DK1 board

    Hey everyone,

    I am working on STM32MP157-DK1 with trustzone cortex-A.
    I want to use the SPI in secure side, but it's possible only with SPI 6 that is not mapped to the outside.


    It's possible to activate SPI (1 ... 5) peripherals in secure side ? if…

  • Memory barrier (DSB, DMB). Does they guarantee writing data on cache to memory?

    Hi Experts,

    I'm reading white paper for ARMv7 and ARMv8.

    but when i reading cache part and memory re-ordering, i have silly questions.....

    Suppose there are below instructions..

     

    Core A:

         STR R0, [Msg]

         STR R1, [Something…

  • Trustzone FIQ latency measurement When security extension is enabled

    Hello Guys,

    Please refer below attached image. as shown in this image i want to measure the different latencies in my Trustzone based application.

    Here is the list of measurements which i want to perform.   

    1) FIQ latency when RTOS runs and FIQ occurs …