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  • PMU CP15 on AARCH64 - Cortex a-53 - Assembly Error on MRC-MCR

    Hi,

    I am trying to compile PMU Cycle Counter  as per  the code available in this blog PMU Enable on a RPI3 B+ using Suse 64 bits Aarch 64 4.12.14-lp150.12.28-default.

    I have the Assembly error on each MRC or MCR instructions. In the ARM i have the feeling…