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  • Platform security architecture is announced by Arm

  • A question about interrupt priority degrade

    Hi guys,

    I found in armv8-arch ref manual that when PRIS bit in the AIRCR is set, the priority of non-secure handler is mapped to the bottom of the priority range. So I did an experiment.

    I configured two exceptions, systick and svc. The priority are 2…

  • New online training course – An Introduction to Armv8-M

    We are very pleased to announce a new online training topic – An Introduction to Armv8-M.

    This is the latest addition to our introduction to Arm the Arm architecture series and is targeted to those new to developing on Armv8-M or those wanting a…