1/ WHY "the width of the ID field at a slave interface is wider than the ID field at a master
interface"??? Can you please explain in more detail the reason???
2/ Do AXI protocol have support "read interleaving"???
Thanks you so much…
1/ What will happen when a master performs 2 exclusive read with 2 different transaction ID to the sam an address location??
Example: Master0 (M0) issue 2 exclusive read with 2 different transaction ID (first is 00 and second is 01) to the sam an address…
Hi,
I need a clarification on PENABLE with respect to PREADY. 1) Can pready remain high for more than one cycle? 2) Does PENABLE from the master has to look for PREADY going low to deassert or it should go low the cycle next to the assertion of PREADY…
Hi, I'm a graduate student living in south Korea. I'm studying about AMBA 3.0 AXI.
recently, i read "AMBA® AXI Protocol.pdf". but i have two questions about AXI after reading.
as you can see the first picture, slave send the read…
I'm a graduate student living in south Korea. I'm studying about AMBA 3.0 AXI.
i wonder about interleaving and out-of order.
AXI supports…
Recently, I read "AMBA AXI Protocol.pdf". but i have two questions about AXI after reading.
Firstly, i very wonder AWID, WID and BID when write transaction…
I have several questions about barrier operarions.
1. how to operate barrier instructions ISB, DMB, DSB in ACE?
a) when ISB is executed, what are the signal values about barrier transaction (AxBAR, AxSNOOP , AxDOMAIN)?
…